This disclosure relates to a method for testing input/output drivers for a circuit, and, in particular, testing of an integrated semiconductor circuit as well as a corresponding test device.
Generally speaking, for testing an integrated semiconductor circuit with n signal connections an automatic tester or a test device with n inputs and outputs is required. The automatic tester may apply test signals to the semiconductor circuit and subsequently measure and evaluate at a speed required by the respective test specimen (so-called “at-speed test”). The automatic tester is cheaper the fewer signal inputs and outputs are required and the lower the frequencies required for the test. Test methods are therefore sought on economic grounds which can be conducted using simple automatic testers with the fewest possible signals inputs and outputs and low frequencies.
Instead of costly function testing of digital circuits “at speed” using all the circuit signal connections, structural test methods are increasingly being used and are known by the names “scanpath” and “boundary scan”, as examples, with only a few signal connections for the circuit to be tested needing to be contacted. In the case of the “scanpath” test method there is direct access to all sequential parts of the circuit to be tested, whereas with the “boundary scan” test method there is access to all internal logic circuit inputs and outputs. However, this method cannot yet establish whether the other non-contacted circuit signal connections can be routed outward free from error and function at the required speed (i.e., with this test method the functioning of all the various signal connections for allocated input and output drivers cannot be tested and whether their bond connections are free from error or not cannot be established). There is, therefore, the risk that errors in the input and output circuits of the semiconductor circuits to be tested are not discovered and that defective circuits may be delivered to customers under certain circumstances.